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​High Performance Computing on FPGA using Latest Technologies, (9 May 2017, 10am)

Published on: 05-May-2017

The details of the seminar are as follows:

Date : 9 May 2017 (Tuesday)​
Time : 10 am
Venue : NTU, 50 Nanyang Avenue, Singapore 639798, Block N4-B2B-05
            School of CSE, Hardware & Embedded Systems Lab (HESL)
            Location - HESL Lab​

Abstract: 

High Performance Computing on FPGA is mainstream. Large financial institutions use FPGA to accelerate trading and risk analysis. The oil and gas industry use FPGAs to crunch through seismic analysis and find new reserves. Amazon Web Services offer FPGA enhanced servers. Microsoft have accelerated Bing and their Azure cloud services with FPGA technology. Intel bought Altera for $16.7 Billion. That is the value that Intel put on HPC on FPGA. All this interest is fueling new innovations in FPGA technology. FPGA fabric is being coupled more closely with both processors and cache coherent memory. Design tools now support compilation of OpenCL and C++ to FPGA. 

High Performance Computing on FPGA is not just for big dollars and big data. A $400 USB connected FPGA board can provide a 20x speed-up to bioinformatics algorithms running on a desktop PC. FPGAs can bring a higher performance per Watt to any sized system, from an embedded platform to an entire data center. Although, not every application can be accelerated with FPGA technology. Even those applications that are amenable to parallelization may need careful adaptation. 

In this talk I will outline a framework for assessing both applications and FPGA platforms for computing acceleration. As an illustration a sequence alignment algorithm is analyzed and mapped to FPGA. On the surface this algorithm appears simple. However, it serves to highlight many aspects of design that directly affect the speed up that can be achieved. This application is mapped to several different platforms in order to explain some of the important platform considerations.

 

Biography of Speaker: 

Dr Tim Oliver is a Senior Design Engineer at PHABRIX Ltd in the UK (since April 2016) combining DSP and Video Processing on FPGA to provide visual analysis of Ultra High Definition video streams for broadcast. From 2007 through to 2016 he was the FPGA Technology Lead developing High Performance Embedded Computing platforms for rugged environments at Curtiss-Wright Controls in the UK. There he worked on multi-FPGA processing platforms designed for radar and communications. A typical application would process several GHz ADC streams using complex DSP pipelines on FPGA before passing them on to CPUs via PCIe. 

Between 2006 and 2007, Dr Tim was the acceleration architect at Progeniq, a Singapore start-up specializing in affordable FPGA based algorithm accelerators for the bioinformatics research community. Progeniq used clusters of relatively small and low cost FPGAs connected via USB to speed-up large bioinformatics data processing applications. He completed his PhD at Nanyang Technological University in Singapore between 2002 and 2009. His research interest is Computing on FPGA, in particular hyper-customized computing circuits and new CAD tools and techniques to enable dynamic partial reconfiguration. He has 5 journal publications and 14 conference publications.

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